The present invention relates to a system for processing a planar structure, such as a semiconductor wafer. The invention also relates to a manufacturing method which includes the steps of segmenting a wafer into portions and then reducing the thickness of the segmented portions. The invention also relates to the segmented wafer portions themselves.
In a known manufacturing process, a plurality of integrated circuits are simultaneously patterned and defined on the front surface of a single silicon wafer. The circuits are generally aligned in rows and columns in an orthogonal format. After the circuits are fully defined, the wafer is diced by a sawing machine along lines between the rows and columns to separate the wafer into individual chips. The chips can then be secured within individual packages and/or incorporated into electronic devices.
In the known process, the silicon wafer is sliced from a generally cylindrical ingot. The wafer is at first sliced sufficiently thick enough so as not to warp or break during the formation of the integrated circuits. However, the desired thickness for the finished chips is less than the initial thickness of the sliced wafer. Therefore, after the integrated circuit patterns are defined in the wafer, it has been necessary to grind the back surface of the wafer to reduce its thickness as desired for the finished products.
Grinding machines for grinding down the back surfaces of silicon wafers are known in the art. The known machines have chuck tables for securing a plurality of wafers in position to be ground by one or more grinding wheels. Examples of such grinding machines are illustrated in U.S. Pat. No. 5,679,060 (Leonard), U.S. Pat. No. 4,753,049 (Mori), U.S. Pat. No. 5,632,667 (Earl), and U.S. Pat. No. 5,035,087 (Nishiguchi).
The known wafer processing systems are unsatisfactory, particularly for wafers of relatively large diameter and/or reduced thickness. Recently, silicon wafers having diameters of about thirty centimeters have come into commercial acceptance. These large diameter wafers are prone to breakage and cracking. The tendency of such wafers to break and crack during dicing substantially increases the expense of the fabrication process and reduces process yields. In general, the tendency toward breaking and cracking is proportional to the diameter of the wafer and inversely proportional to its thickness.